Filter
Top Products
Architecture
31
Table 3-8. Multiply, multiply / add instructions (R3000A extended instruction set)
MULT, MULTU, MADD, MADDU (ISA extended set)
Instruction Format and Description
Multiply MULT rd, rs, rt
Multiply the contents of registers rs and rt as two’s complement integers, and
store the doubleword (64-bit) result in multiply/divide registers HI and LO.
Also, store the lower 32 bits in register rd.
Multiply
Unsigned
MULTU rd, rs, rt
Multiply the contents of registers rs and rt as unsigned integers, and store the
doubleword (64-bit) result in multiply/divide registers HI and LO. Also, store
the lower 32 bits in register rd.
Multiply ADD MADD rd, rs, rt
MADD rs, rt
Multiply the contents of registers rs and rt as two’s complement integers, and
add the doubleword (64-bit) result to multiply/divide registers HI and LO.
Also, store the lower 32 bits of the add result in register rd. In the MADD rs, rt
format, the store operation to a general register is omitted.
Multiply ADD
Unsigned
MADDU rd, rs, rt
MADDU rs, rt
Multiply the contents of registers rs and rt as unsigned integers, and add the
doubleword (64-bit) result to multiply/divide registers HI and LO. Also, store the
lower 32 bits of the add result in register rd. In the MADDU rs, rt format, the
store operation to a general register is omitted.
rtrs funct0op rd