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8085AH/8085AH-2/8085AH-1
X,
B085AH
----,
I
I
I CINT
...L
~
15 pF
'T"
I
I
X2
I
___
--1
a.
Quartz
Crystal
Clock
Driver
x,
8085AH
----,
I
I CINT
...J....
~15pF
T
I
X2
___
-.J
b. LC Tuned
Circuit
Clock
Driver
8085AH
x,
f"
\...--_6K_--t
c.
RC
Circuit
Clock
Driver
+5V
4700
TO
1KO
·X2 LEFT FLOATING
LOW
TIME>
60 n8
/
x,
d. 1-6 MHz
Input
Frequency
External
Clock
Driver
Circuit
+5V
LOW
TIME>
40
ns
.mil
/
.,.....------1
X,
4700
e. 1-12 MHz
Input
Frequency
External
Clock
Driver
Circuit
Figure
5.
Clock
Driver
Circuits
GENERATING AN 8085AH WAIT STATE
If
your
system requirements are such
that
slow
memories
or
peripheral devices are being used, the
circuit
shown in Figure 6 may be used
to
insert one
WAIT state in each 8085AH machine cycle.
The
0 flip-flops should be chosen so that
• CLK is rising edge-triggered
• CLEAR is low-level active.
6-15
~
~
CLEAR
B085AH
AlE'-
ClK
CLKOUTPUT'
__
ClK
TO
8085AH
"D"
"D"
READY
F/F
Q
F/F
0:
INPUT
+5V
--
D
D
'ALE
AND CLK (OUT) SHOULD BE BUFFERED
IF
CLK INPUT
OF
LATCH
EXCEEDS
8085AH IOL
OR
IOH.
Figure
6.
Generation
of
a Wait
State
for
8085AH
CPU
AFN·O,835C