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8085AH/8085AH-2/8085AH-1
Table 6. Instruction Set Summary (Continued)
Instruction Code
Operations Instruction Code
Operations
Mnemonic
07
06
05
04
03
02
01
Do
Description Mnemonic
07
06
Os
04 03 02
0,
Do
Description
LOGICAL
I And register with A
ANA r
1 0 1 0 0 S S S
SPECIALS
CMA
0 0
1
0
1 1 1 1 Complement
XRA r
1 0
1
0
1
S S S
Exclusive
OR
register A
with A
STC
0 0
1 1
0
1 1 1 Set carry
ORAr
1 0
1 1
0 S S S
OR
register with A
CMC
0 0
1 1 1 1 1 1 Complement
CMPr
1
0
1 1 1
S S
S
Compare register with A
carry
ANAM
1
0
1
0 0
1 1
0
And memory with A
OM 0
0
1
0
0 1 1 1
Decimal adjust A
XRAM
1
0
1
0
1 1 1 0
Exclusive
OR
memory
CONTROL
with A
EI
1 1 1 1 1 0 1 1
Enable Interrupts
ORAM
1 0
1
1
0
1 1
0
OR
memory with A
01
1
1 1 1
0 0
1 1 Disable Interrupt
CMPM
1
0
1 1 1 1
1
0
Compare
memory with A
NOP
[g
0 0 0 0 0 0 0
No-operation
HLT
1 1 1 0
1 1
0 Halt
ANI
1 1 1
0 0
1 1 0
And immediate with A
XRI
1 1 1
0
1 1 1 0
Exclusive
OR
immediate
with A
NEW
8085A '1STRUCTIONS
RIM 0 0 1 0 0
0 0 0
Read
Interrupt Mask
SIM 0 0 1 1 0 a a a
Set Interrupt Mask
ORI
1 1 1 1
0
1 1 0
OR
immediate with A
CPI
1 1 1
1 1
1 1
0
Compare immediate
with A
ROTATE
RLC
0 0 0
0
0
1
1
1 Rotate A left
RRC
0 0 0 0
1 1
1 1 Rotate A right
RAL
0 0 0
1
0
1
1 1
Rotate A
left through
carry
RAR
0 0 0
1 1 1
1 1
Rotate A right through
carry
NOTES:
1. DOS
or
SSS:
8000,
C
001,0010,
E011, H 100, L 101,
Memory
110, A 111.
2. Two
possible
cycle
times
(6/12)
indicate
instruction
cycles
dependent
on
condition
flags.
"All
mnemonics
copyrighted
©Intel
Corporation
1976.
6-25
AFN·01835C