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FIGURE 3·3A DECODED
CHIP
SELECTS
A.
A.
A,.
A'3
A'2
101M
A,s
A,
A,
Ao
E3
E,
r
E
,
8205
0,
F>---r
I
O.
I
I
0
3
:>
0,
0,
0
0
SYSTEM OPERATION
les
I
lA,
Ao
yes
82535
A,
I
Ao
8251A
es
-Ao
J~
8259-5
.8255A-5
1/0 PORT
1
0 1
0
OIX
X
X
Aol
~
1/0 PORT
r--
1
0 0
1
OIX
X
A,
Aol
1/0 PORT
RD
10
0 0
-
WR
.A
I.
1/0 PORT
.;
00
-0,
1
0 0
0
OIX
"I
ADo-AD,
FIGURE 3·3B DECODED CONTROLS AND LATCHED ADDRESS (Mcs·ao™ TYPE BUS)
~
________
~KI~W
__________
~WR
~
________
~R)~R
__________
~RD
~----MEMW
Ir-----
MEMR
A,s---------------------------------qcs
r----------~
Ao
11
X
X X
8251A
ADo-AD,
'-r-------...,
Do-D7
8212
00,
.•
1--
_______
--,/
Ao-A,
ALE
-----------1
FIGURE 3·3 MCS·80™ PERIPHERALS WITH
110
MAPPED
110
A14
A,3
A12
A,s
101M
A.
ADo-AD,
A
(,
"I
8205
A,
A,
Ao
E3
E2
r
E
,
0,:-
I
I
I
I
I
I
8251A
cs
Oo~
I
Ao
.
RD
WR
I\.
J 0
0
-0,
X
A,
Aol
Aol
1/0
PORT
10
X
-1-
X
Aol
1/0 ADDRESS
Xl
FIGURE 3·4 MCS·80™ PERIPHERALS WITH MEMORY·MAPPED
110
AND DECODED
CHIP
SELECTS
3-6
11
I:
I
I