Intel MCS-80/85 Computer Hardware User Manual


 
TH E INSTRUCTION SET
INX rp (Increment register pair)
(rh) (rl)
.-
(rh) (rl) + 1
The
content
of
the register pair rp is in-
cremented by one. Note: No
condition
flags
are
affected.
o
o
R
P
Cycles:
States:
Addressing:
Flags:
o
o
1
6 (8085), 5 (8080)
register
none
DCX
rp
(Decrement register pair)
(rh) (rl)
.-
(rh) (rl) - 1
The
content
of
the
register pair rp is
decremented by one. Note: No
condition
flags
are
affected.
o
o
R P
Cycles:
States:
Addressing:
Flags:
o
1
6 (8085), 5 (8080)
register
none
DAD rp (Add register pair
to
Hand
L)
(H) (L)
.-
(H) (L) + (rh) (rl)
The
content
of
the
register pair rp is added
to
the
content
of
the
register pair
Hand
L.
The result is placed in
the
register pair H
and
L.
Note:
Only
the
CY
flag
is
affected.
It
is
set
if
there is a carry
out
of
the
double
precision add;
otherwise
it
is reset.
o
o
R
P
Cycles:
States:
Addressing:
Flags:
o
3
10
register
CY
o
* All mnemonics copyrighted © Intel Corporation.
1976.
5-9
DAA (Decimal
Adjust
Accumulator)
The eight-bit number in
the
accumulator
is
adjusted
to
form
two
four-bit Binary-Coded-
Decimal
digits
by
the
following
process:
1.
If the value
of
the lease
significant
4
bits
of
the
accumulator
is
greater than 9
or
if
the AC flag is set, 6 is added
to
the ac-
cumulator.
2.
If
the value
of
the
most
significant
4
bits
of
the
accumulator
is
now
greater than 9,
or
if
the CY flag is set, 6 is added
to
the
most
significant
4
bits
of
the ac-
cumulator.
NOTE: All
flags
are
affected.
o
o
o
Cycles:
States:
Flags:
5.6.3 Logical Group
o
1
4
Z,S,P,CY,AC
This group
of
instructions
performs logical
(Boolean)
operations
on
data
in registers and
memory and on
condition
flags.
Unless indicated otherwise, all
instructions
in
this
group
affect
the Zero, Sign, Parity,
Auxiliary
Carry, and Carry flags
according
to
the stan-
dard rules.
ANA
r (AND Register)
(A)
.-
(A)
/\
(r)
The
content
of
register r is
logically
ANDed
with
the
content
of
the accumulator. The
result is placed in the accumulator. The CY
flag
is
cleared and AC
is
set
(8085). The CY
flag
is
cleared and
AC
is
set
to
the OR'ing
of
bits
3
of
the operands (8080).
0
0
0
S S
S
Cycles:
1
States:
4
Addressing: register
Flags: Z,S,P,CY,AC