National CP3BT26 Computer Hardware User Manual


 
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CP3BT26
30.10 ADVANCED AUDIO INTERFACE (AAI) TIMING
Figure 116. Receive Timing, Short Frame Sync
Table 87 Advanced Audio Interface (AAI) Signals
Symbol
Figure
Description Reference Min (ns) Max (ns)
AAI Input Signals
t
RDS
116,
118
Receive Data Setup Time
Before Falling Edge (FE)
on SRCLK
20 -
t
RDH
116,
118
Receive Data Hold Time After FE on SRCLK 20 -
t
FSS
116 Frame Sync Setup Time
Before Rising Edge (RE)
on SRCLK
20 -
t
FSH
116 Frame Sync Hold Time After RE on SRCLK 20 -
AAI Output Signals
t
CP
116 Receive/Transmit Clock Period
RE on SRCLK/SCK to RE
on SRCLK/SCK
976.6 -
t
CL
116 Receive/Transmit Low Time
FE on SRCLK/SCK to RE
on SRCLK/SCK
488.3 -
t
CH
116 Receive/Transmit High Time
RE on SRCLK/SCK to FE
on SRCLK/SCK
488.3 -
t
FSVH
116,
118
Frame Sync Valid High
RE on SRCLK/SCK to RE
on SRFS/SFS
-20
t
FSVL
116,
118
Frame Sync Valid Low
RE on SRCLK/SCK to FE
on SRFS/SFS
-20
t
TDV
117,
119
Transmit Data Valid RE on SCK to STD Valid - 20
0
t
CP
t
CH
SRD
SRCLK
t
CL
SRFS
DS116
1
012
t
FSVH
t
FSVL
t
RDH
t
RDS