National CP3BT26 Computer Hardware User Manual


 
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CP3BT26
Figure 125. ACB Signals (SDA and SCL) Timing
Figure 126. ACB Start and Stop Condition Timing
Figure 127. ACB Start Condition Timing
SCL
0.7VCC
Note: In the timing tables the parameter name is added with an "o" for output signal timing and "i" for input signal timing.
0.3VCC
t
SCLf
0.7VCC
0.3VCC
t
SCLr
SDA
0.7VCC
0.3VCC
t
SDAf
0.7VCC
0.3VCC
t
SDAr
DS106
SCL
SDA
t
DLCs
t
CSTOs
t
CSTRh
Stop Condition Start Condition
t
BUF
Note: In the timing tables the parameter name is added with an "o" for output signal timing and "i" for input signal timing.
DS107
SCL
SDA
t
DHCs
t
CSTRs
Start Condition
t
CSTRh
Note: In the timing tables the parameter name is added with an "o" for output signal timing
and "i" for input signal timing.
DS108