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CP3BT26
30.11 MICROWIRE/SPI TIMING
Table 88 Microwire/SPI Signals
Symbol
Figure
Description Reference Min (ns) Max (ns)
Microwire/SPI Input Signals
t
MSKh
120 Microwire Clock High At 2.0V (both edges) 80 -
t
MSKl
120 Microwire Clock Low At 0.8V (both edges) 80 -
t
MSKp
120
Microwire Clock Period
SCIDL bit = 0; Rising Edge
(RE) MSK to next RE MSK
200
-
121
SCIDL bit = 1; Falling Edge
(FE) MSK to next FE MSK
-
t
MSKh
120 MSK Hold (slave only) After MWCS goes inactive 40 -
t
MSKs
120 MSK Setup (slave only) Before MWCS goes active 80 -
t
MWCSh
120
MWCS
Hold (slave only)
SCIDL bit = 0: After FE
MSK
40
-
121
SCIDL bit = 1: After RE
MSK
-
t
MWCSs
120
MWCS
Setup (slave only)
SCIDL bit = 0: Before RE
MSK
80
-
121
SCIDL bit = 1: Before FE
MSK
-
t
MDIh
120
Microwire Data In Hold (master)
Normal Mode: After RE
MSK
0
-
122
Alternate Mode: After FE
MSK
-
120
Microwire Data In Hold (slave)
Normal Mode: After RE
MSK
40
-
122
Alternate Mode: After FE
MSK
-
t
MDIs
120
Microwire Data In Setup
Normal Mode: Before RE
MSK
80
-
122
Alternate Mode: Before FE
MSK
-
Microwire/SPI Output Signals
t
MSKh
120 Microwire Clock High At 2.0V (both edges) 40 -
t
MSKl
120
Microwire Clock Low At 0.8V (both edges) 40 -
t
MSKp
120
Microwire Clock Period
SCIDL bit = 0: Rising Edge
(RE) MSK to next RE MSK
100
-
121
SCIDL bit = 1: Falling Edge
(FE) MSK to next FE MSK
-
t
MSKd
120
MSK Leading Edge Delayed (master
only)
Data Out Bit #7 Valid 0.5 t
MSK
1.5 t
MSK
t
MDOf
120
Microwire Data Float
b
(slave only)
After RE on MWCS
-25
t
MDOh
120
Microwire Data Out Hold
Normal Mode: After FE
MSK
0.0
-
121
Alternate Mode: After RE
MSK
t
MDOnf
124 Microwire Data No Float
(slave only) After FE on MWCS 025