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FLL+ Clock Module Operation
4-8 FLL+ Clock Module
4.2.6 DCO Modulator
The modulator mixes two adjacent DCO frequencies to produce an
intermediate effective frequency and spread the clock energy, reducing
electromagnetic interference (EMI)
.
The modulator mixes the two adjacent
frequencies across 32 DCOCLK clock cycles.
The error of the effective frequency is zero every 32 DCOCLK cycles and does
not accumulate. The modulator settings and DCO control are automatically
controlled by the FLL hardware. Figure 4−3 illustrates the modulator
operation.
Figure 4−3. Modulator Patterns
Lower DCO Tap Frequency f
DCO
31
24
16
15
5
4
3
2
1
0
Upper DCO Tap Frequency f
DCO+1
One ACLK Cycle
f
(DCOCLK)
Cycles, Shown for f(DCOCLK)=f(ACLK) × 32
N
DCOmod