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Instruction Set
3-42
RISC 16−Bit CPU
* INCD[.W] Double-increment destination
* INCD.B Double-increment destination
Syntax INCD dst or INCD.W dst
INCD.B dst
Operation dst + 2 −> dst
Emulation ADD #2,dst
Emulation ADD.B #2,dst
Example The destination operand is incremented by two. The original contents are lost.
Status Bits N: Set if result is negative, reset if positive
Z: Set if dst contained 0FFFEh, reset otherwise
Set if dst contained 0FEh, reset otherwise
C: Set if dst contained 0FFFEh or 0FFFFh, reset otherwise
Set if dst contained 0FEh or 0FFh, reset otherwise
V: Set if dst contained 07FFEh or 07FFFh, reset otherwise
Set if dst contained 07Eh or 07Fh, reset otherwise
Mode Bits OSCOFF, CPUOFF, and GIE are not affected.
Example The item on the top of the stack (TOS) is removed without using a register.
.......
PUSH R5 ; R5 is the result of a calculation, which is stored
; in the system stack
INCD SP ; Remove TOS by double-increment from stack
; Do not use INCD.B, SP is a word-aligned
; register
RET
Example The byte on the top of the stack is incremented by two.
INCD.B 0(SP) ; Byte on TOS is increment by two