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Scan IF Operation
24-16 Scan IF
TSM Operation
The TSM state machine automatically starts and re-starts periodically based
on a divided ACLK start signal selected with the SIFDIV2x bits the SIFDIV3Ax
and SIFDIV3Bx bits when SIFTSMRP = 0. For example, if SIFDIV3A and
SIFDIV3B are configured to 270 ACLK cycles, then the TSM automatically
starts every 270 ACLK cycles. When SIFTSMRP = 1 the TSM starts
immediately with the SIFSTM0 state with the next ACLK cycle after
encountering a state with a set SIFSTOP bit. The SIFIFG2 interrupt flag is set
when the TSM starts.
The SIFDIV3Ax and SIFDIV3Bx bits may be updated anytime during
operation. When updated, the current TSM sequence will continue with the old
settings until the last state of the sequence completes. The new settings will
take affect at the start of the next sequence.
TSM Control of the AFE
The TSM controls the AFE with the SIFCHx, SIFLCEN, SIFEX, SIFCA,
SIFRSON, SIFTESTS1, SIFDAC, and SIFSTOP bits. When any of these bits
are set, their corresponding signal(s), SIFCHx(tsm), SIFLCEN(tsm),
SIFEX(tsm), SIFCA(tsm), SIFRSON(tsm), SIFTESTS1(tsm), SIFDAC(tsm),
and SIFSTOP(tsm) are high for the duration of the state. Otherwise, the
corresponding signal(s) are low.
TSM State Duration
The duration of each state is individually configurable with the SIFREPEATx
bits. The duration of each state is SIFREPEATx + 1 times the selected clock
source. For example, if a state were defined with SIFREPEATx = 3 and
SIFACLK = 1, the duration of that state would be 4 x ACLK cycles. Because
of clock synchronization, the duration of each state is affected by the clock
source for the previous state, as shown in Table 24−5.
Table 24−5.TSM State Duration
SIFACLK
For
Previous
State
For
Current
State
State Duration, T
0
0 T = (SIFREPEATx + 1) x 1/f
SIFCLK
0 1 (SIFREPEATx) x 1/f
ACLK
t T v (SIFREPEATx + 1) x
1/f
ACLK
1 0 (SIFREPEATx + 1) x 1/f
SIFCLK
v T t (SIFREPEATx + 2) x
1/f
SIFCLK
1 1 T = (SIFREPEATx + 1) x 1/f
ACLK