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Instruction Set
3-22
RISC 16−Bit CPU
ADD[.W] Add source to destination
ADD.B Add source to destination
Syntax ADD src,dst or ADD.W src,dst
ADD.B src,dst
Operation src + dst −> dst
Description The source operand is added to the destination operand. The source operand
is not affected. The previous contents of the destination are lost.
Status Bits N: Set if result is negative, reset if positive
Z: Set if result is zero, reset otherwise
C: Set if there is a carry from the result, cleared if not
V: Set if an arithmetic overflow occurs, otherwise reset
Mode Bits OSCOFF, CPUOFF, and GIE are not affected.
Example R5 is increased by 10. The jump to TONI is performed on a carry.
ADD #10,R5
JC TONI ; Carry occurred
...... ; No carry
Example R5 is increased by 10. The jump to TONI is performed on a carry.
ADD.B #10,R5 ; Add 10 to Lowbyte of R5
JC TONI ; Carry occurred, if (R5) ≥ 246 [0Ah+0F6h]
...... ; No carry