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Instruction Set
3-21
RISC 16−Bit CPU
ADC[.W] Add carry to destination
ADC.B Add carry to destination
Syntax ADC dst or ADC.W dst
ADC.B dst
Operation dst + C −> dst
Emulation ADDC #0,dst
ADDC.B #0,dst
Description The carry bit (C) is added to the destination operand. The previous contents
of the destination are lost.
Status Bits N: Set if result is negative, reset if positive
Z: Set if result is zero, reset otherwise
C: Set if dst was incremented from 0FFFFh to 0000, reset otherwise
Set if dst was incremented from 0FFh to 00, reset otherwise
V: Set if an arithmetic overflow occurs, otherwise reset
Mode Bits OSCOFF, CPUOFF, and GIE are not affected.
Example The 16-bit counter pointed to by R13 is added to a 32-bit counter pointed to
by R12.
ADD @R13,0(R12) ; Add LSDs
ADC 2(R12) ; Add carry to MSD
Example The 8-bit counter pointed to by R13 is added to a 16-bit counter pointed to by
R12.
ADD.B @R13,0(R12) ; Add LSDs
ADC.B 1(R12) ; Add carry to MSD