Texas Instruments MSP430x4xx Computer Hardware User Manual


 
USART Operation: UART Mode
14-19USART Peripheral Interface, UART Mode
Receive-Start Edge Detect Operation
The URXSE bit enables the receive start-edge detection feature. The
recommended usage of the receive-start edge feature is when BRCLK is
sourced by the DCO and when the DCO is off because of low-power mode
operation. The ultra-fast turn-on of the DCO allows character reception after
the start edge detection.
When URXSE, URXIEx and GIE are set and a start edge occurs on URXDx,
the internal signal URXS will be set. When URXS is set, a receive interrupt
request is generated but URXIFGx is not set. User software in the receive
interrupt service routine can test URXIFGx to determine the source of the
interrupt. When URXIFGx = 0 a start edge was detected and when URXIFGx
= 1 a valid character (or break) was received.
When the ISR determines the interrupt request was from a start edge, user
software toggles URXSE, and must enable the BRCLK source by returning
from the ISR to active mode or to a low-power mode where the source is active.
If the ISR returns to a low-power mode where the BRCLK source is inactive,
the character will not be received. Toggling URXSE clears the URXS signal
and re-enables the start edge detect feature for future characters. See chapter
System Resets, Interrupts, and Operating Modes for information on entering
and exiting low-power modes.
The now active BRCLK allows the USART to receive the balance of the
character. After the full character is received and moved to UxRXBUF,
URXIFGx is set and an interrupt service is again requested. Upon ISR entry,
URXIFGx = 1 indicating a character was received. The URXIFGx flag is
cleared when user software reads UxRXBUF.
; Interrupt handler for start condition and
; Character receive. BRCLK = DCO.
U0RX_Int BIT.B #URXIFG0,&IFG2 ; Test URXIFGx to determine
JNE ST_COND ; If start or character
MOV.B &UxRXBUF,dst ; Read buffer
... ;
RETI ;
ST_COND BIC.B #URXSE,&U0TCTL ; Clear URXS signal
BIS.B #URXSE,&U0TCTL ; Re-enable edge detect
BIC #SCG0+SCG1,0(SP) ; Enable BRCLK = DCO
RETI ;
Note: Break Detect With Halted UART Clock
When using the receive start-edge detect feature a break condition cannot
be detected when the BRCLK source is off.