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Instruction Set
3-38
RISC 16−Bit CPU
* DECD[.W] Double-decrement destination
* DECD.B Double-decrement destination
Syntax DECD dst or DECD.W dst
DECD.B dst
Operation dst − 2 −> dst
Emulation SUB #2,dst
Emulation SUB.B #2,dst
Description The destination operand is decremented by two. The original contents are lost.
Status Bits N: Set if result is negative, reset if positive
Z: Set if dst contained 2, reset otherwise
C: Reset if dst contained 0 or 1, set otherwise
V: Set if an arithmetic overflow occurs, otherwise reset.
Set if initial value of destination was 08001 or 08000h, otherwise reset.
Set if initial value of destination was 081 or 080h, otherwise reset.
Mode Bits OSCOFF, CPUOFF, and GIE are not affected.
Example R10 is decremented by 2.
DECD R10 ; Decrement R10 by two
; Move a block of 255 words from memory location starting with EDE to memory location
; starting with TONI
; Tables should not overlap: start of destination address TONI must not be within the
; range EDE to EDE+0FEh
;
MOV #EDE,R6
MOV #510,R10
L$1 MOV @R6+,TONI−EDE−2(R6)
DECD R10
JNZ L$1
Example Memory at location LEO is decremented by two.
DECD.B LEO ; Decrement MEM(LEO)
Decrement status byte STATUS by two.
DECD.B STATUS