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SD16 Operation
21-8 SD16
Digital Filter Output
The number of bits output by each digital filter is dependent on the
oversampling ratio and ranges from 16 to 24 bits. Figure 21−4 shows the
digital filter output bits and their relation to SD16MEMx for each OSR. For
example, for OSR = 256 and LSBACC = 1, the SD16MEMx register contains
bits 23 − 8 of the digital filter output. When OSR = 32, the SD16MEMx LSB is
always zero.
The SD16LSBACC and SD16LSBTOG bits give access to the least significant
bits of the digital filter output. When SD16LSBACC = 1 the 16 least significant
bits of the digital filter’s output are read from SD16MEMx using word
instructions. The SD16MEMx register can also be accessed with byte
instructions returning only the 8 least significant bits of the digital filter output.
When SD16LSBTOG = 1 the SD16LSBACC bit is automatically toggled each
time the corresponding channel’s SD16MEMx register is read. This allows the
complete digital filter output result to be read with two read accesses of
SD16MEMx. Setting or clearing SD16LSBTOG does not change
SD16LSBACC until the next SD16MEMx access.
Figure 21−4. Used Bits of Digital Filter Output.
048121620 153269723 22 21 19 18 17 15 14 13 11 10
OSR=32, LSBACC=x
048121620 153269723 22 21 19 18 17 15 14 13 11 10
OSR=64, LSBACC=0
048121620 153269723 22 21 19 18 17 15 14 13 11 10
OSR=64, LSBACC=1
048121620 153269723 22 21 19 18 17 15 14 13 11 10
OSR=128, LSBACC=0
048121620 153269723 22 21 19 18 17 15 14 13 11 10
OSR=128, LSBACC=1
048121620 153269723 22 21 19 18 17 15 14 13 11 10
OSR=256, LSBACC=0
048121620 153269723 22 21 19 18 17 15 14 13 11 10
OSR=256, LSBACC=1