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Theory of Operation
3–38
1780R-Series Service Manual
50% to above, the output of the amplifier changes from being limited at the
positive supply to being limited at the negative supply. This negative transition is
coupled through C557, turning on Q658 to begin the ramp.
When Slow Sweep Trigger is set to – a decreasing APL change, through 50%,
passes through a 0 volt threshold set on U458A by the SLOW SWP +/– control
line being low on the + input of U458A. As the APL changes from above 50% to
below, the output of the amplifier changes from being limited at the positive
supply to being limited at the negative supply. This negative transition is coupled
through C457, turning on Q658 to begin the ramp.
Slow Sweep Ramp Generator. The ramp is produced by an integrator that consists
of an amplifier, U458D, and an integrating capacitor, C359. Integrator current
source is through R360 and R361. Charging current is varied by the W HORZ
GAIN level, which can be set between ±3 volts. Changing the charging current
for C359 affects the slope of the Slow Sweep Ramp, and therefore the time
required per trace.
Sweep retrace occurs when the ramp voltage turns on VR462 (≈6.2 volts), which
causes the output of U458C to limit near its positive supply voltage and turns on
CR358 and CR359 to discharge the integrator. When U485C limits, the SLOW
SWP BLNK line goes high to start the CRT blanking pulse. The negative
transition of the ramp resetting conducts through C660 to move the input, of
458C, to –6 volts. This holds the output of the amplifier high and the integrator
off until C660 is charged up to approximately ground from the current through
R656 and R659, or through Q658 when it is turned on by an APL change trigger.
When C660 charges up to 0 volts, the amplifier output goes to approximately
ground to start the ramp and bring the SLOW SWP BLNK line low again to end
the CRT blanking pulse.
The SLOW SWP EN line is high when slow sweep is occurring. When slow
sweep is not selected (CRT menu selection), the SLOW SWP EN line is low
which pulls the SLOW SWP BLNK line to approximately 0.5 volts, which is
ignored. In addition, when SLOW SWP EN line is low the output of the
integrator is held to approximately –3 volts, which will back bias the switching
diode at the input to the Mag Amplifier on Diagram 11.