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Theory of Operation
1780R-Series Service Manual
3–43
flip-flops drive U980 where a color field 1 pulse is output on pin 20 during line
11 (NTSC) or line 7 (PAL). The 1781 also outputs a Bruch frame pulse, on pin
21, during line 7 of fields 1 and 5. Both the field 1 and Bruch pulses are required
by the MPU for line selection.
An internally-referenced NTSC SCH display can be set to display one (single) or
two (double mode) by setting J1085. The double mode (two dots 180_ apart) is
more convenient for examining such things as color frame switching angle in
processing equipment. Regardless of the jumper setting the display reverts to
single dot display when an external reference is selected (Relative SCH mode).
The single dot display is generated by blanking the Z-Axis at a line alternate
rate. The switching is controlled by the FLD SCH BLK pulse on pin 22.
The 1781 FLD SCH BLK pulse (pin 22) blanks the SCH compass rose circle for
14 lines either side of the SCH dot.
Oscillator Phase Generator U985A and B generate pulses that are input to U990,
on Diagram 15, to ensure that the Sync Locked Oscillator phase is correct. U980
outputs a color framing pulse that clears U985A and B just prior to vertical sync.
Clearing these D-type flip-flops early allows the 1780R-Series to operate with
VTRs that may be experiencing head dropout around the start of vertical sync.
Output of these flip-flops is also fed back to U980 to provide a true starting point
for the field 1 pulse. U985A and B can be driven with an external field 1 pulse
that is input through J870. Q970 and Q969 are a 7 ms half-shot to ensure that no
matter what the external pulse duration the flip-flops will be cleared with a 7 ms
duration pulse. J1081 controls whether an external pulse is required to clear
U985A and B.