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Theory of Operation
3–68
1780R-Series Service Manual
The DP Zero adjustment, C172, provides a small amount of delay to the
switching signal in order to have the demodulator timed to the R-Y Demodulator
(Diagram 28).
Differential Gain Demodulator. U261 is a balanced demodulator used as an
envelope detector that multiplies the input chroma by itself to come up with a
DC current proportional to the input chroma amplitude. The signal and switching
inputs are driven by chroma, whose amplitude is set by the Gain Cell on
Diagram 25. The demodulator input gain is set by the value of R359, which is
physically located between pins 2 and 3.
The demodulator is enabled when Q278 saturates, causing 5 mA of current to
flow into pin 5. The DC voltage on pin 5 is approximately –8.7 volts when Q278
is on. The output of the demodulator is an amplified, full-wave-rectified version
of the input chroma. The DC component of this signal is proportional to the
chroma amplitude.
The Differential Gain Demodulator produces a large DC component at the output
of the current mirror. Q265, a current sink, is turned on when Q278 is turned on
to remove this component and place the trace at center screen when the chroma
amplitude is correctly set (chroma vector at the vectorscope compass rose). The
amount of current drawn off is nominally 2.2 mA, and is set by R167 (DC
Offset).
Current Mirror, Limiter, Filter, and Output Amplifier. Q158 is the current mirror
providing a single-ended output of a differential current input. Pin 12 of both
demodulators is directly connected to the output of the current mirror, while pin
6 of both demodulators is connected to an inverting input. This inverting and
adding of one input current gives the stage an effective gain of 2. When the
output currents are balanced, R163 and R164 set the voltage level out for Q158
at approximately 6 volts.
Q159 and Q160 are emitter followers configured as a diode limiter. The base of
Q159 is set to 5.6 volts and the base of Q160 at 6.4 volts. When the demodulator
output currents are unbalanced the voltage level on the limiter emitters changes.
For example, when the demodulator pin 6 current is higher than that on pin 12
(output in the direction of R-Y) the emitter voltage rises. When the emitter
voltage reaches approximately 7 volts, Q160 clamps the signal so that it can not
drive the following stages into limit. Conversely, if pin 6 current is lower than
the demodulator pin 12 current, the emitter level drops and Q159 will clamp
when the signal reaches +5 volts.
Q167 and Q277 are the active elements of a 750-kHz-wide low-pass filter. The
low-pass filtered signal drives the inverting input of the operational amplifier
employed as the Output Amplifier. Gain is set by adjusting R370 so that an
output of 750 mV is equal to 7_ (NTSC) or 5_ (PAL). The same 750 mV in the
Diff Gain mode equates to 7% (NTSC) or 5% (PAL). The Demod Offset is set