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Theory of Operation
3–42
1780R-Series Service Manual
U1497B is a D-type flip-flop that generates a negative pulse (Q) to turn on
U1397 immediately after the Sample Gate again goes low. This flip-flop-gener-
ated TSC pulse is approximately 1 subcarrier cycle in duration.
Lock detection is done by U1497A, a flip-flop. When the loop is locked, the F
SC
feedback signal (pin 2) will always be high when the Sample Gate (pin 3)
transitions positive. Thus the output from U1497A (pin 5) will also be high. If,
however, the loop is unlocked, the F
SC
feedback signal will sometimes be low
when the Sample Gate clocks U1497A. In fact it will be a 50% duty cycle square
wave equal to the oscillator frequency error that will appear at pin 5. Q1396,
which is normally off, now gets switched at this rate and charges C1394 through
R1396 causing the emitter of Q1395 to rise toward 0 volts. This causes current to
flow through R1397 and increase the charge pump constant current source,
U1287C, by a factor of up to 4 (4 × loop gain). When the emitter of Q1395
reaches –4 volts, Q1397D is turned off, taking the Fine SCH correction out of
the circuit. This aids lockup by removing any bias in the Phase Detector.
The time constant of R1396, R1494, and C1394 causes a gradual attack, very
slow release on Q1395. If the Sync Locked Oscillator is near locking up, it may
not be necessary to shut off the Fine SCH Adjust; a slight increase in gain (more
current flowing in U1297) might be all that is required for lockup (no apparent
shift in displayed SCH dots). If there is an apparent lock (lock detector true for a
few lines), the loop does not revert to lower gain and bandwidth only to have to
go back and search for true lockup.
Flywheel Counter. U975 and U977 form a 525 line (625 for PAL) flywheel
counter. It is clocked by Ref H sync and is phased up in the frame by the V sync
pulse. It automatically counts either to 525 (NTSC) or 625 (PAL) lines and then
resets. U975A and B form a ripple counter that generates 8 bits. The two MSBs
are generated by U977, which also contains the logic needed to output the
Vertical Lockout that inhibits the DC Restorer for the video input circuits
(Diagrams 1 and 2) and shuts off the backporch and sync tip sample-and-holds
(Diagram 15) during the vertical sync time.
The other control signal output from the Flywheel Counter is the Field Chroma
switch, which is used by the Vectorscope circuitry to multiplex the SCH and
vector display when Vector + SCH mode is selected. The SCH display in this
mode is turned on only during the vertical interval when no color information is
present on the signal.
Color Frame Logic. U980 is a programmed logic array that makes signal
generation decisions based on line count, from the Flywheel Counter, and sync
and timing signals from other diagrams. U980 looks for the sync phase pulse
(pin 17) going high on a particular line of the monochrome field to identify color
field 1. (The 1781 also examines the +V burst phase to help with identification.)
An NTSC frame pulse is output at pin 15 on field 4, line 261 (the PAL frame
pulse is output on field 8, line 620) to phase up the flip-flops, U985. The
Circuit Theory
(Diagram 14)