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User’s Manual
IBM PowerPC 750GX and GL RISC Microprocessor
Exceptions
Page 154 of 377
gx_04.fm.(1.2)
March 27, 2006
• Exceptions caused by asynchronous events (interrupts). These exceptions are further distinguished by
whether they are maskable and recoverable.
– Asynchronous, nonmaskable, nonrecoverable
System reset for assertion of HRESET
—Has highest priority and is taken immediately regardless of
other pending exceptions or recoverability (includes power-on reset).
– Asynchronous, maskable, nonrecoverable
Machine-check exception—Has priority over any other pending exception except system reset for
assertion of HRESET
. Taken immediately regardless of recoverability.
– Asynchronous, nonmaskable, recoverable
System reset for assertion of S
RESET—Has priority over any other pending exception except sys-
tem reset for HRESET
(or power-on reset), or machine check. Taken immediately when a recover-
able state is reached.
– Asynchronous, maskable, recoverable
System management, performance monitor, thermal-management, external, and decrementer inter-
rupts—Before handling this type of exception, the next instruction in program order must complete. If
that instruction causes another type of exception, that exception is taken and the asynchronous,
maskable recoverable exception remains pending, until the instruction completes. Further instruction
completion is halted. The asynchronous, maskable recoverable exception is taken when a recover-
able state is reached.
• Instruction-related exceptions. These exceptions are further organized based on the point in instruction
processing at which they generate an exception.
– Instruction fetch
Instruction storage interrupt (ISI) exceptions—Once this type of exception is detected, dispatching
stops, and the current instruction stream is allowed to drain out of the machine. If completing any of
the instructions in this stream causes an exception, that exception is taken and the instruction fetch
exception is discarded (but might be encountered again when instruction processing resumes). Oth-
erwise, once all pending instructions have executed and a recoverable state is reached, the ISI
exception is taken.
– Instruction dispatch/execution
Program, data-storage interrupt (DSI), alignment, floating-point unavailable, system call, and instruc-
tion address breakpoint—This type of exception is determined during dispatch or execution of an
instruction. The exception remains pending until all instructions before the exception-causing instruc-
tion in program order complete. The exception is then taken without completing the exception-caus-
ing instruction. If completing these previous instructions causes an exception, that exception takes
priority over the pending instruction dispatch/execution exception, which is then discarded (but might
be encountered again when instruction processing resumes).
– Post-instruction execution
Trace—Trace exceptions are generated following execution and completion of an instruction while
trace mode is enabled. If executing the instruction produces conditions for another type of exception,
that exception is taken and the post-instruction exception is forgotten for that instruction.
Note: These exception classifications correspond to how exceptions are prioritized, as described in Table
4-3, Exception Priorities, on page 155.