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Introduction 76
Models 2616RC, 3096RC & 3196RC Admin Reference Guide 6 • System Clocking
Introduction
During operation all modules within a ForeFront chassis (or within each chassis segment in the Model 6676)
synchronize TDM communications on all DS0 channels with a common clock pulse, called the reference
clock. System clocking parameters within each module define the source and the distribution of the reference
clock pulse. You can choose a Building Integrated System Timing (BITS) clock, any TDM WAN port within
the chassis, or an internal oscillator within a ForeFront module as the source of the ForeFront-chassis reference
clock. You may configure the T-DAC to generate, derive, or receive the reference clock. The T-DAC web man-
agement pages display two clocking source parameters, called the Main Reference and the Fallback Reference.
The clocking subsystem includes a fallback and auto-recovery mechanism, called the Fallback System. For the
fallback feature, the T-DAC monitors a clocking Main Reference (source) and switches to a Fallback Reference
(source) if the Main Reference becomes unavailable. Once the Main Reference clock is re-established, the auto-
recovery feature switches the clocking source back to the main reference. The T-DAC’s clocking fallback system
is factory disabled by default. To activate the T-DAC’s fallback system, you must enable it.
The following parameters control the T-DAC’s clocking subsystem—Clock Reference, Main Reference, Fallback
Reference, Clock Fallback, and Clock Auto Recover.
For each chassis you must configure one and only one module to be the clocking Master. Patton recommends
you also define one, and only one, module to be the clocking Secondary for each chassis (or chassis segment in
the Model 6676). You must define all remaining cards in the chassis to be clocking slaves.
During normal operation the Master provides the synchronizing clock pulse for the entire chassis (or chassis
segment). Certain failures (such as card failure or T1/E1 line failure) may render the Master unable to provide
the reference clock for the chassis. If the clocking Master becomes unable to provide the synchronizing clock,
the clocking Secondary card detects the failure and begins providing the synchronizing clock for the chassis.
For each chassis, you can define up to four separate clock sources: two for the clocking Master module and two
for the clocking Secondary module. At any given time, the modules within the chassis can use one, and only
one, of these references for synchronization. This restriction ensures all clock references synchronize to the
same upstream timing source (the Stratum clock).
If all four clock sources (the Master’s Main and Fallback References and the Secondary’s Main and Fallback
References) become unavailable, the Secondary card will provide its internal oscillator as the synchronizing
clock source for the ForeFront system. If the clocking Fallback System is enabled, the T-DAC automatically
uses the Fallback Reference for synchronization should the Main Reference fail. Similarly, if Clock Auto
Recover is enabled, the TDAC will automatically go back to the Main Reference when it becomes available.
The ForeFront system uses the clock reference options in a hierarchical sequence. If the Master’s Main Refer-
ence fails, the system will use the Master’s Fallback Reference. The entire hierarchical scheme is shown in the
following schematic.
Master’s Main Reference > Master’s Secondary Reference > Secondary’s Main Reference > Secondary’s Fall-
back Reference > Secondary’s Internal clock