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Samsung S3C2440A Laptop User Manual

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S3C2440A RISC MICROPROCESSOR THUMB INSTRUCTION SET

4-3

OPCODE SUMMARY

The following table summarizes the THUMB instruction set. For further information about a particular instruction

please refer to the sections listed in the right-most column.

Table 4-1. THUMB Instruction Set Opcodes

Mnemonic Instruction Lo-Register

Operand

Hi-Register

Operand

Condition

Codes Set

ADC Add with Carry Y – Y

ADD Add Y –

Y

(1)

AND AND Y – Y

ASR Arithmetic Shift Right Y – Y

B Unconditional branch Y – –

Bxx Conditional branch Y – –

BIC Bit Clear Y – Y

BL Branch and Link – – –

BX Branch and Exchange Y Y –

CMN Compare Negative Y – Y

CMP Compare Y Y Y

EOR EOR Y – Y

LDMIA Load multiple Y – –

LDR Load word Y – –

LDRB Load byte Y – –

LDRH Load halfword Y – –

LSL Logical Shift Left Y – Y

LDSB Load sign-extended byte Y – –

LDSH Load sign-extended halfword Y – –

LSR Logical Shift Right Y – Y

MOV Move register Y Y

Y

(2)

MUL Multiply Y – Y

MVN Move Negative register Y – Y

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