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LCD CONTROLLER S3C2440A RISC MICROPROCESSOR
15-28
LCD Control 2 Register
Register Address R/W Description Reset Value
LCDCON2 0X4D000004 R/W LCD control 2 register 0x00000000
LCDCON2 Bit Description Initial State
VBPD [31:24]
TFT: Vertical back porch is the number of inactive lines at the start of
a frame, after vertical synchronization period.
STN: These bits should be set to zero on STN LCD.
0x00
LINEVAL [23:14]
TFT/STN: These bits determine the vertical size of LCD panel.
0000000000
VFPD [13:6]
TFT: Vertical front porch is the number of inactive lines at the end of
a frame, before vertical synchronization period.
STN: These bits should be set to zero on STN LCD.
00000000
VSPW [5:0]
TFT: Vertical sync pulse width determines the VSYNC pulse's high
level width by counting the number of inactive lines.
STN: These bits should be set to zero on STN LCD.
000000