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S3C2440A RISC MICROPROCESSOR CAMERA INTERFACE
23-16
CODEC DMA CONTROL REGISTER
Register Address R/W Description Reset Value
CICOCTRL 0x4F00004C RW Codec DMA control related 0
CICOCTRL Bit Description Initial State
Yburst1_Co [23:19] Main burst length for codec Y frames 0
Yburst2_Co [18:14] Remained burst length for codec Y frames 0
Cburst1_Co [13:9] Main burst length for codec Cb/Cr frames 0
Cburst2_Co [8:4] Remained burst length for codec Cb/Cr frames 0
LastIRQEn_Co [2]
0 = normal
1 = enable last IRQ at the end of the frame capture
(This bit is cleared automatically)
0
NOTE: All burst lengths must be one of the 2, 4, 8, 16.
Example 1: Target image size: QCIF (horizontal Y width = 176 pixels. 1 pixel = 1 Byte. 1 word = 4 pixel)
176 / 4 = 44 word
44 % 8 = 4 → main burst = 8, remained burst = 4
Example 2: Target image size: VGA (horizontal Y width = 640 pixels. 1 pixel = 1 Byte. 1 word = 4 pixel)
640 / 4 = 160 word
160 % 16 = 0 → main burst = 16, remained burst = 16
Example 3: Target image size: QCIF (horizontal C width = 88 pixels. 1 pixel = 1 Byte. 1 word = 4 pixel)
88 / 4 = 22 word
22 % 4 = 2 → main burst = 4, remained burst = 2 (HTRANS==INCR)