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S3C2440A RISC MICROPROCESSOR LCD CONTROLLER
15-39
LCD Interrupt Mask Register
Register Address R/W Description Reset Value
LCDINTMSK 0X4D00005C R/W Determine which interrupt source is masked.
The masked interrupt source will not be serviced.
0x3
LCDINTMSK Bit Description Initial state
FIWSEL
[2] Determine the trigger level of LCD FIFO.
0 = 4 words 1 = 8 words
INT_FrSyn
[1] Mask LCD frame synchronized interrupt.
0 = The interrupt service is available.
1 = The interrupt service is masked.
1
INT_FiCnt
[0] Mask LCD FIFO interrupt.
0 = The interrupt service is available.
1 = The interrupt service is masked.
1