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S3C2440A RISC MICROPROCESSOR THUMB INSTRUCTION SET
4-21
INSTRUCTION CYCLE TIMES
All instructions in this format have an equivalent ARM instruction as shown in Table 4-9. The instruction cycle
times for the THUMB instruction are identical to that of the equivalent ARM instruction.
EXAMPLES
STRH R4, [R3, R0] ; Store the lower 16 bits of R4 at the address
formed by adding R0 to R3.
LDSB R2, [R7, R1] ; Load into R2 the sign extended byte
found at the address formed by adding R1 to R7.
LDSH R3, [R4, R2] ; Load into R3 the sign extended halfword
found at the address formed by adding R2 to R4.