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THUMB INSTRUCTION SET S3C2440A RISC MICROPROCESSOR
4-36
FORMAT 17: SOFTWARE INTERRUPT
[7:0] Comment Field
15 0
1
14
10
13 12
11
Value 8
1
78
10 9
1111
Figure 4-18. Format 17
OPERATION
The SWI instruction performs a software interrupt. On taking the SWI, the processor switches into ARM state and
enters Supervisor (SVC) mode.
The THUMB assembler syntax for this instruction is shown below.
Table 4-18. The SWI Instruction
THUMB assembler ARM equivalent Description
SWI Value 8 SWI Value 8 Perform Software Interrupt:
Move the address of the next instruction into LR,
move CPSR to SPSR, load the SWI vector address
(0x8) into the PC. Switch to ARM state and enter
SVC mode.
NOTE
Value8 is used solely by the SWI handler; it is ignored by the processor.
INSTRUCTION CYCLE TIMES
All instructions in this format have an equivalent ARM instruction as shown in Table 4-18. The instruction cycle
times for the THUMB instruction are identical to that of the equivalent ARM instruction.
EXAMPLES
SWI 18 ; Take the software interrupt exception. Enter Supervisor
mode with 18 as the requested SWI number.