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S3C2440A RISC MICROPROCESSOR MEMORY CONTROLLER
5-1
5 MEMORY CONTROLLER
OVERVIEW
The S3C2440A memory controller provides memory control signals that are required for external memory access.
The S3C2440A has the following features:
— Little/Big endian (selectable by a software)
— Address space: 128Mbytes per bank (total 1GB/8 banks)
— Programmable access size (8/16/32-bit) for all banks except bank0 (16/32-bit)
— Total 8 memory banks
Six memory banks for ROM, SRAM, etc.
Remaining two memory banks for ROM, SRAM, SDRAM, etc .
— Seven fixed memory bank start address
— One flexible memory bank start address and programmable bank size
— Programmable access cycles for all memory banks
— External wait to extend the bus cycles
— Supporting self-refresh and power down mode in SDRAM