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Bit Name Function Bit Name Function
0 ENSYNC1 Enable Ext1 output 26 OPENINH Input protection inhibit
1 ENSYNC2 Enable Ext2 output 27 TESTLEDS LED test
2 ENEXT1 Enable Ext1 input 28 not used
3 ENEXT2 Enable Ext2 input 29 not used
4 CALSELA Lower bit of cal source select 30 not used
5 CALSELB Upper bit of cal source select 31 not used
6 TERM75 1
0 - Ch1 input impedance 50
Ω
1 - Ch1 input impedance 75Ω
32 CH1HCAL 0 - switches H_CAL to ch1 +input
1 - switches HI to ch1 +input
7 SINGEND1 0 - Ch1 S/E input disabled
1 - Ch1 S/E input enabled
33 CH1LCAL 0 - switches L_CAL to ch1 -input
1 - switches LO to ch1 -input
8 DUMMY1 Ch1 dummy load select 34 ATT20DB 0 - Ch1 20dB input attenuator ON
1 - Ch1 20dB input attenuator OFF
9 FILTER1 0 - Ch1 filter disabled
1 - Ch1 filter enabled
35 CH1POST 0 - Ch1 20dB post attenuator ON
1 - Ch1 20dB post attenuator OFF
10 PIGGY1 0 - Ch1 attenuators disabled
1- Ch1 attenuators enabled
36 CH1INPT 0 - Ch1 differential input enabled
1 - Ch1 differential input disabled
11 TERM75 2
0 - Ch2 input impedance 50
Ω
1 - Ch2 input impedance 75Ω
37 CH1INT 0 - Ch1 6dB int attenuator ON
1 - Ch1 6dB int attenuator OFF
12 SINGEND2 0 - Ch2 S/E input disabled
1 - Ch2 S/E input enabled
38 CH1INT 0 - Ch1 14dB int attenuator ON
1 - Ch1 14dB int attenuator OFF
13 DUMMY2 Ch2 dummy load select 39 not used
14 FILTER2 0 - Ch2 filter disabled
1 - Ch2 filter enabled
40 CH2HCAL Ch2 - see bit 32
15 PIGGY2 0 - Ch2 attenuators disabled
1- Ch2 attenuators enabled
41 CH2LCAL Ch2 - see bit 33
16 CAL1A(0) Ch1 cal address line 0 42 ATT20DB 0 - Ch2 20dB input attenuator ON
1 - Ch2 20dB input attenuator OFF
17 CAL1A(1) Ch1 cal address line 1 43 CH2POST 0 - Ch2 20dB post attenuator ON
1 - Ch2 20dB post attenuator OFF
18 CAL1A(2) Ch1 cal address line 2 44 CH2INPT 0 - Ch2 differential input enabled
1 - Ch2 differential input disabled
19 CAL1A(3) Ch2 cal address line 3 45 CH2INT 0 - Ch2 6dB int attenuator ON
1 - Ch2 6dB int attenuator OFF
20 CAL1EN Ch1 cal enable 46 CH2INT 0 - Ch2 14dB int attenuator ON
1 - Ch2 14dB int attenuator OFF
21 CAL2A(0) Ch2 cal address line 0 47 not used
22 CAL2A(1) Ch2 cal address line 1 48 - 49 HCALMUX
Output
LCALMUX
Output
Bits: 49/51 48/50
0 0 GND
0 1 +10V REF
1 0 +1V REF
1 1 CALSIG
23 CAL2A(2) Ch2 cal address line 2
50 - 51
352 Register Programming Appendix C