Filter
Top Products
4. Set the sample rate.
A. If the trigger source is not reference period / N (base + 4D
16
bits
4 - 2 =1 0 0), the decade division register and binary division
register must be set as follows:
write a value of 1 to base + 61
16
write a value of 132 to base + 63
16
B. If the trigger source is the reference period / N ( base + 4D
16
bits
4 - 2 =1 0 0), then to set the sample rate (period) you must know the
rate you want and the reference frequency. From these values, a
value (N) is determined as shown below.
N = reference frequency / required sample rate
The reference frequency is then divided by N (Ref/N) to obtain the
sample rate. N is represented by the decade division register (61
16
)
and the binary division register (63
16
).
For example, to program a sample rate of 1 kHz (1 ms period) using
the digitizer’s internal 20 MHz reference:
N = 20 MHz / 1 kHz = 20,000
16
10
is written to the decade division register (base + 61
16
) to set a
division by 10,000. All other bits are set to 0. 132
10
is written to the
binary division register (base + 63
16
) to set a division by 2. (Bits 7 -
4 must always be set to 1 0 0 0.) These settings divide the reference
frequency by 20,000 which gives the required sample rate of 1 kHz.
5. Set the digitizer A/D converter as the high-speed clock source and data
source for memory.
A. Using the traffic register (base +02
16
), set the pulse register as
the high-speed clock source by setting bits 3 - 2 to ’0 0’. Retain the
settings of the other bits.
B. Send a clock pulse to the internal high-speed bus by reading or
writing (any value) to the pulse register (base +08
16
).
C. Using the traffic register (base +02
16
), set the A/D as the
high-speed clock source and as the high-speed data source by
setting bits 3 - 0 to ’0 1 0 0’. Retain the settings of the other bits.
384 Register Programming Appendix C