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DS33R11 Ethernet Mapper with Integrated T1/E1/J1 Transceiver
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Register Name:
TR.IAAR
Register Description:
Idle Array Address Register
Register Address:
7Eh
Bit # 7 6 5 4 3 2 1 0
Name GRIC GTIC IAA5 IAA4 IAA3 IAA2 IAA1 IAA0
Default 0 0 0 0 0 0 0 0
Bit 7: Global Receive-Idle Code (GRIC). Setting this bit causes all receive channels to be set to the idle code
written to the TR.PCICR register. This bit must be set = 0 for read operations. The value in bits IAA0–IAA5 must be
a valid transmit channel (01h to 20h for E1 mode; 01h to 18h for T1 mode).
Bit 6: Global Transmit-Idle Code (GTIC). Setting this bit causes all transmit channels to be set to the idle code
written to the PCICR register. This bit must be set = 0 for read operations. The value in bits IAA0–IAA5 must be a
valid transmit channel (01h to 20h for E1 mode; 01h to 18h for T1 mode).
GRIC GTIC FUNCTION
0 0 Updates a single transmit or receive channel
0 1 Updates all transmit channels
1 0 Updates all receive channels
1 1 Updates all transmit and receive channels
Bits 0 – 5: Channel Pointer Address Bits (IAA0 to IAA5). These bits select the channel to be programmed with
the idle code defined in the TR.PCICR register. IAA0 is the LSB of the 5-bit channel code. Channel 1 is 01h.
Register Name:
TR.PCICR
Register Description:
Per-Channel Idle Code Register
Register Address:
7Fh
Bit # 7 6 5 4 3 2 1 0
Name C7 C6 C5 C4 C3 C2 C1 C0
Default 0 0 0 0 0 0 0 0
Bits 0 – 7: Per-Channel Idle-Code Bits (C0 to C7). This register defines the idle code to be programmed in the
channel selected by the TR.IAAR register. C0 is the LSB of the idle code (this bit is transmitted last).
Register Name:
TR.TCICE1
Register Description:
Transmit-Channel Idle-Code Enable Register 1
Register Address:
80h
Bit # 7 6 5 4 3 2 1 0
Name CH8 CH7 CH6 CH5 CH4 CH3 CH2 CH1
Default 0 0 0 0 0 0 0 0
Bits 0 – 7: Transmit Channels 1 to 8 Code Insertion Control Bits (CH1 to CH8)
0 = do not insert data from the idle-code array into the transmit data stream
1 = insert data from the idle-code array into the transmit data stream