Renesas H8S/2111B Network Card User Manual


 
Rev. 1.00, 05/04, page 187 of 544
External clock
sources
Internal clock
sources
TMR_A
φ, φ/2, φ/4, φ/2048, φ/4096, φ/8192
Clock A
Clock B
Compare-match AA
Compare-match AB
Clear A
CMIAAB
CMIBAB
OVIAB
ICIA
TMOB
TMRIB
TCORA_B
Comparator A_B
Comparator B_B
TCORB_B
TCSR_B
TCR_B
TCORA_A
Comparator A_A
TCNT_A
Comparator B_A
TCORB_A
TICRR_A
TICRF_A
TICR_A
TCSR_A
TCR_A
TMCIB
TMCIA
TISR_A
TCNT_B
Overflow A
Overflow B
Compare- match BA
Compare-match BB
Input capture
Clock
select
Internal bus
Control
logic
[Legend]
TCORA_A: Time constant register A_A
TCORB_A: Time constant register B_A
TCNT_A: Timer counter_A
TCSR_A: Timer control/status register_A
TCR_A: Timer control register_A
TICR_A: Input capture register_A
TICRR_A: Input capture register R_A
TICRF_A: Input capture register F_A
TCORA_B: Time constant register A_B
TCORB_B: Time constant register B_B
TCNT_B: Timer counter_B
TCSR_B: Timer control/status register_B
TCR_B: Timer control register_B
TISR_B: Timer input select register_B
Clear B
TMR_B
φ/4, φ/256, φ/2048, φ/4096, φ/8192, φ/16384
Interrupt signals
TMOA
TMRIA
Figure 10.3 Block Diagram of 8-Bit Timer (TMR_B and TMR_A)