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Rev. 1.00, 05/04, page 391 of 544
R/W
Bit Bit Name
Initial
Value
Slave Host Description
6 IRQ10E3 0 R/W — Host IRQ10 Interrupt Enable 3
Enables or disables a host IRQ10 interrupt request
when OBF3A is set by an ODR3 write.
0: Host IRQ10 interrupt request by OBF3A and
IRQ10E3 is disabled
[Clearing conditions]
• Writing 0 to IRQ10E3
• LPC hardware reset, LPC software reset
• Clearing OB3FA to 0 (when IEDIR = 0)
1: [When IEDIR = 0]
Host IRQ10 interrupt request by setting OBF3A to 1
is enabled
[When IEDIR = 1]
Host IRQ10 interrupt is requested.
[Setting condition]
• Writing 1 after reading IRQ10E3 = 0
5 IRQ9E3 0 R/W — Host IRQ9 Interrupt Enable 3
Enables or disables a host IRQ9 interrupt request when
OBF3A is set by an ODR3 write.
0: Host IRQ9 interrupt request by OBF3A and IRQ9E3
is disabled
[Clearing conditions]
• Writing 0 to IRQ9E3
• LPC hardware reset, LPC software reset
• Clearing OBF3A to 0 (when IEDIR = 0)
1: [When IEDIR = 0]
Host IRQ9 interrupt request by setting OBF3A to 1
is enabled
[When IEDIR = 1]
Host IRQ9 interrupt is requested.
[Setting condition]
• Writing 1 after reading IRQ9E3 = 0