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Rev. 1.00, 05/04, page 3 of 544
1.3 Pin Description
1.3.1 Pin Arrangement
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VCC
P43/TMCI1
P44/TMO1
P45/TMRI1
P46
P47
VSS
RES
MD1
MD0
NMI
STBY
VCL
P52/ExSCK1*/SCL0
P51/ExRxD1*
P50/ExTxD1*
P97/SDA0
P96/φ/ EXCL
P95
P94
P93
P92/IRQ0
P91/IRQ1
P90/IRQ2/ADTRG
PE7
PE6
PE5
PE4
PE3
PE2
PE1
PE0
PA7/KIN15/PS2CD
PA6/KIN14/PS2CC
PA5/KIN13/PS2BD
VCCB
P13/PW3
P14/PW4
P15/PW5
P16/PW6
P17/PW7
P20
P21
P22
P23
P24
P25
P26
P27
VSS
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
VCC
P67/TMOX/KIN7/IRQ
7
P66/FTOB/KIN6/IRQ6
P65/FTID/KIN5
P64/FTIC/KIN4
P63/FTIB/KIN3
P62/FTIA/KIN2/TMIY
P61/FTOA/KIN1
P60/FTCI/KIN0/TMIX
AVref
AVCC
P77
P76
P75/AN5
P74/AN4
P73/AN3
P72/AN2
P71/AN1
P70/AN0
AVSS
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PG0
PG1
PG2
PG3
PG4/ExSDAA*
PG5/ExSCLA*
PG6/ExSDAB*
PG7/ExSCLB*
PF0/TMIA
PF1/TMIB
PF2/TMOA
PF3/TMOB
PF4/ExTMIX*
PF5/ExTMIY*
PF6/ExTMOX*
PF7/TMOY*
VSS
PA0/KIN8
PA1/KIN9
PA2/KIN10/PS2AC
PA3/KIN11/PS2AD
PA4/KIN12/PS2BC
P12/PW2
P11/PW1
VSS
P10/PW0
PB7/WUE7
PB6/WUE6
PB5/WUE5
PB4/WUE4
PB3/WUE3
PB2/WUE2
PB1/WUE1/LSCI
PB0/WUE0/LSMI
P30/LAD0
P31/LAD1
P32/LAD2
P33/LAD3
P34/LFRAME
P35/LRESET
P36/LCLK
P37/SERIRQ
P80/PME
P81/GA20
P82/CLKRUN
P83/LPCPD
P84/IRQ3/TxD1
P85/IRQ4/RxD1
P86/IRQ5/SCK1/SCL1
P40/TMCI0
P41/TMO0
P42/TMRI0/SDA1
VSS
X1
X2
RESO
XTAL
EXTAL
TFP-144
(Top view)
Note: * The program development tool (emulator) does not support this function.
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Figure 1.2 Pin Arrangement