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30 AMD Geode™ SC2200 Processor Data Book
Signal Definitions
32580B
B6 AD23 I/O IN
PCI
,
O
PCI
V
IO
Cycle Multiplexed
A23 O O
PCI
B7 V
SS
GND --- --- ---
B8 RD# O O
3/5
V
IO
---
CLKSEL0 I
(PD
100
)
IN
STRP
Strap (See Table
3-4 on page 45.)
B9 WR# O O
3/5
V
IO
B10 V
SS
GND --- --- ---
B11 VSYNC O O
1/4
V
IO
---
B12 RED O WIRE AV
C-
CCRT
---
B13 V
IO
PWR --- --- ---
B14 AV
SSCRT
GND --- --- ---
B15 SETRES I WIRE AV
C-
CCRT
---
B16 V
IO
PWR --- --- ---
B17
6, 2
BUSY/WAIT# I IN
T
V
IO
PMR[23]
3
= 0 and
(PMR[27] = 0 and
FPCI_MON = 0)
TFTD3 O O
1/4
PMR[23]
3
= 1 and
(PMR[27] = 0 and
FPCI_MON = 0)
F_C/BE1# O O
1/4
PMR[23]
3
= 0 and
(PMR[27] = 1 or
FPCI_MON = 1)
B18
6, 2
ACK# I IN
T
V
IO
PMR[23]
3
= 0 and
(PMR[27] = 0 and
FPCI_MON = 0)
TFTDE O O
1/4
PMR[23]
3
= 1 and
(PMR[27] = 0 and
FPCI_MON = 0)
FPCICLK O O
1/4
PMR[23]
3
= 0 and
(PMR[27] = 1 or
FPCI_MON = 1)
B19 V
IO
PWR --- --- ---
B20
6,2
SLIN#/ASTRB# O O
14/14
V
IO
PMR[23]
3
= 0 and
(PMR[27] = 0 and
FPCI_MON = 0)
TFTD16 O O
1/4
PMR[23]
3
= 1 and
(PMR[27] = 0 and
FPCI_MON = 0)
F_IRDY# O O
14/14
PMR[23]
3
= 0 and
(PMR[27] = 1 or
FPCI_MON = 1)
B21
6,2
INIT# O O
14/14
V
IO
PMR[23]
3
= 0 and
(PMR[27] = 0 and
FPCI_MON = 0)
TFTD5 O O
1/4
PMR[23]
3
= 1 and
(PMR[27] = 0 and
FPCI_MON = 0)
SMI_O O O
14/14
PMR[23]
3
= 0 and
(PMR[27] = 1 or
FPCI_MON = 1)
B22 V
SS
GND --- --- ---
B23 NC --- --- --- ---
B24 V
SS
GND --- --- ---
Ball
No. Signal Name
I/O
(PU/PD)
Buffer
1
Type
Power
Rail Configuration
B25 V
SS
GND --- --- ---
B26 NC --- --- --- ---
B27
6
DPOS_PORT2 I/O IN
USB
,
O
USB
AV
C-
CUSB
---
B28
6
DNEG_PORT2 I/O IN
USB
,
O
USB
AV
C-
CUSB
---
B29 GPIO10 I/O
(PU
22.5
)
IN
TS
, O
8/8
V
IO
PMR[18] = 0 and
PMR[8] = 0
DSR2# I
(PU
22.5
)
IN
TS
PMR[18] = 1 and
PMR[8] = 0
IDE_IORDY1 I
(PU
22.5
)
IN
TS1
PMR[18] = 0 and
PMR[8] = 1
SDTEST1 O
(PU
22.5
)
O
2/5
PMR[18] = 1 and
PMR[8] = 1
B30 V
SS
GND --- --- ---
B31 V
IO
PWR --- --- ---
C1 AD26 I/O IN
PCI
,
O
PCI
V
IO
Cycle Multiplexed
D2 I/O IN
PCI
,
O
PCI
C2 AD24 I/O IN
PCI
,
O
PCI
V
IO
Cycle Multiplexed
D0 I/O IN
PCI
,
O
PCI
C3 V
IO
PWR --- --- ---
C4 AD25 I/O IN
PCI
,
O
PCI
V
IO
Cycle Multiplexed
D1 I/O IN
PCI
,
O
PCI
C5 GNT0# O O
PCI
V
IO
---
DID0 I
(PD
100
)
IN
STRP
Strap (See Table
3-4 on page 45.)
C6 GNT1# O O
PCI
V
IO
---
DID1 I
(PD
100
)
IN
STRP
Strap (See Table
3-4 on page 45.)
C7 V
IO
PWR --- --- ---
C8 ROMCS# O O
3/5
V
IO
---
BOOT16 I
(PD
100
)
IN
STRP
V
IO
Strap (See Table
3-4 on page 45.)
C9 GPIO19 I/O
(PU
22.5
)
IN
TS
, O
3/5
V
IO
PMR[9] = 0 and
PMR[4] = 0
INTC# I
(PU
22.5
)
IN
TS
PMR[9] = 0 and
PMR[4] = 1
IOCHRDY I
(PU
22.5
)
IN
TS1
PMR[9] = 1 and
PMR[4] = 1
C10 V
IO
PWR --- --- ---
C11 IRTX O O
8/8
V
IO
PMR[6] = 0
SOUT3 O O
8/8
PMR[6] = 1
C12 V
SSCRT
GND --- --- ---
C13 AV
CCCRT
PWR --- --- ---
C14 AV
SSCRT
GND --- --- ---
C15 AV
SSCRT
GND --- --- ---
Ball
No. Signal Name
I/O
(PU/PD)
Buffer
1
Type
Power
Rail Configuration
Table 3-2. BGU481 Ball Assignment - Sorted by Ball Number (Continued)