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AMD Geode™ SC2200 Processor Data Book 53
Signal Definitions
32580B
X32I AJ2 I/O Crystal Connections. Connected directly to a 32.768
KHz crystal. This clock input is required even if the inter-
nal RTC is not being used. Some of the internal clocks
are derived from this clock. If an external clock is used, it
should be connected to X32I, using a voltage level of 0
volts to V
CORE
+10% maximum. X32O should remain
unconnected.
---
X32O AJ3 ---
X27I AG3 I/O Crystal Connections. Connected directly to a
27.000 MHz crystal. Some of the internal clocks are
derived from this clock. If an external clock is used, it
should be connected to X27I, using a voltage level of 0
volts to V
IO
and X27O should be remain unconnected.
---
X27O AH2 ---
CLK27M AA4 O 27 MHz Output Clock. Output of crystal oscillator. IDE_DATA5
PCIRST# A6 O PCI and System Reset. PCIRST# is the reset signal for
the PCI bus and system. It is asserted for approximately
100 µs after POR# is negated.
---
3.4.1 System Interface (Continued)
Signal Name Ball No. Type Description Mux