384 AMD Geode™ SC2200 Processor Data Book
Electrical Specifications
32580B
Figure 9-4. Memory Controller Output Valid Timing Diagram
Figure 9-5. Read Data In Setup and Hold Timing Diagram
SDCLK[3:0]
Control Output, MA[12:0]
BA[1:0], MD[63:0]
t
1
, t
2
, t
3
t
6
t
7
t
7
V
REF
V
OHD
V
OLD
V
REF
t
10
t
11
SDCLK_IN
Data Valid
MD[63:0]
Read Data In
t
4
t
5
t
4
t
5
Data Valid
V
REF
V
IHD
V
ILD
t
9
t
9