EMC DS-32B2 Switch User Manual


 
1
ramTest
1-385
Telnet Commands
ramTest
Bit write and read test of SDRAMs in the switch.
Syntax
ramTest [patternSize]
Availability Admin
Description Use this command to verify the address and data bus of the SDRAMs
that serve as CPU memory in the switch.
The test consists of two subtests:
The address subtest verifies that SDRAM locations can be
uniquely accessed.
The method used is to write a unique pattern to each location in
the SDRAMs. When all are written, the data is read back from
each location and compared against the data previously written.
A failure in the test implies that the address path between the
CPU and the SDRAMs are faulty, resulting in failures to program-
unique values.
Following is the ramp pattern used in the test:
0x57626f42, 0x57626f43, 0x57626f44, 0x57626f45, ...
The data subtest verifies that each cell in the SDRAMs can be
independently written and read, and that there is no short,
stuck-at-1, or stuck-at-0 faults between data cells.
The method used is to write pattern D to location N, write the
complementary pattern D to location N+1, and then read and
compare location N to location N+1. Bump the location to test:
N=N+1. Repeat the double write and read until all locations are
tested with the following nine patterns:
0x55555555
0x69696969
0x3c3c3c3c
0x1e1e1e1e
0x87878787
0x14284281
0x137ffec8
0x0f0f0f0f
0x00000000