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Subtest 5
The forced bad buffer number error subtest verifies that the bad
buffer number in the data packet can be detected, its error flag and
interrupt bits are set.
The test method is as follows:
1. Clear the error and interrupt bits of all ASICs.
2. Set up the hardware so that transmission of data includes a bad
buffer number.
3. For each ASIC X in the switch, do:
For each of the 11 possible offsets, do:
a. Write a 64 byte pattern in the Central Memory.
b. Read X from all ASIC Y in the switch.
c. Check that X has its:
– interrupt bits are set.
– error type is buffer number error.
– the port number in error is the receiver port (which is the
base port of asic Y).
d. Check that all other ASICs (~X) DO NOT get:
– an interrupt, or
– an error flagged.
e. Reading the error register clears the CMEM interrupt bit;
ready for the next offset to test.
Subtest 6
The forced bad chip number error subtest verifies that the bad buffer
number in the data packet can be detected, its error flag and interrupt
bits are set.
The test method is as follows:
1. Clear the error and interrupt bits of all ASICs.
2. Set up the hardware so that transmission of data includes a bad
buffer number.
3. For each ASIC X in the switch, do:
For each of the 11 possible offsets, do:
a. Write a 64 byte pattern in the Central Memory.
b. Read X from all ASIC Y in the switch.