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Serial Interfaces
Serial Interface Timing
Panasonic Semiconductor Development Company MN102H75K/F75K/85K/F85K LSI User Manual
130
Panasonic
5.5.2 UART Mode Timing
In these timing charts, the character length is 8 bits, the parity is none, and the
stop bit is 2-bit.
Figure 5-6 Synchronous Serial Reception Timing
Figure 5-7 UART Transmission Timing
Figure 5-8 UART Reception Timing
SBI
SBT
RXBUSY
Rx interrupt
RXA
(1 when Rx data in)
Data read
Rx
b0 b1 b2 b3 b4 b5 b6 b7
PTY
SBO
Data write
TXBUSY
Tx interrupt
ST b0 b1 b2 b3 b4 b5 b6 b7 SP SP
Tx
SBI
RXBUSY
Rx interrupt
RXA
(1 when Rx data in)
Data read
ST b0 b1 b2 b3 b4 b5 b6 b7 SP SP
Rx