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Interrupts
Interrupt Control Registers
MN102H75K/F75K/85K/F85K LSI User Manual Panasonic Semiconductor Development Company
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Panasonic
VBIVWICL: VBIVSYNC (2) Interrupt Control Register (Low) x’00FC8A’
VBIVWICL detects and requests VBIVSYNC (2) interrupts. It is an 8-bit
access register. Use the MOVB instruction to access it.
VBIVWIR: VBIVSYNC (2) interrupt request flag
0: No interrupt requested
1: Interrupt requested
VBIVWID: VBIVSYNC (2) interrupt detect flag
0: Interrupt undetected
1: Interrupt detected
VBIVWICH: VBIVSYNC (2) Interrupt Control Register (High) x’00FC8B’
VBIVWICH enables VBIVSYNC (2) interrupts. It is an 8-bit access register.
Use the MOVB instruction to access it.
The priority level for VBIVSYNC (2) interrupts is written to the
VBIVLV[2:0] field of the VBIVICH register.
VBIVWIE: VBIVSYNC (2) interrupt enable flag
0: Disable
1: Enable
TM3UDICL: Timer 3 Underflow Interrupt Control Register (Low) x’00FC8C’
TM3UDICL detects and requests timer 3 underflow interrupts. It is an 8-
bit access register. Use the MOVB instruction to access it.
TM3UDIR: Timer 3 underflow interrupt request flag
0: No interrupt requested
1: Interrupt requested
TM3UDID: Timer 3 underflow interrupt detect flag
0: Interrupt undetected
1: Interrupt detected
Bit:76543210
———
VBIVW
IR
———
VBIVW
ID
Reset:00000000
R/W:RRRR/WRRRR
Bit:76543210
———————
VBIVW
IE
Reset:00000000
R/W:RRRRRRRR/W
Bit:76543210
———
TM3UD
IR
———
TM3UD
ID
Reset:00000000
R/W:RRRR/WRRRR