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Analog-to-Digital Converter
A/D Conversion Timing
Panasonic Semiconductor Development Company MN102H75K/F75K/85K/F85K LSI User Manual
146
Panasonic
6.4.4 Single Channel/Continuous Conversion Timing
When ANMD[1:0] = b’10’, the ADC converts one ADIN input signal contin-
uously. An interrupt occurs each time the conversion ends. Load the number of
the channel to be converted in the AN1CH[3:0] field of the ADC control register
(ANCTR). (The ANNCH[3:0] field is ignored in this mode.)
When the software starts the conversion, write a 0 to the ANTC bit (disabling
conversion start at timer 1 underflow), then write a 1 to ANEN. (If ANTC = 1,
ANEN goes high upon a timer 1 underflow.) ANEN remains high during the con-
version. To end the A/D conversion, write a 0 to ANEN.
6.4.5 Multiple Channel/Continuous Conversion Timing
When ANMD[1:0] = b’11’, the ADC converts multiple, consecutive ADIN input
signals continuously. An interrupt occurs each time the conversion sequence
ends. Load 0s to the AN1CH[3:0] field of the ADC control register (ANCTR),
then load the number of the final channel in the sequence to the ANNCH[3:0]
field. The sequence always begins with channel 0.
When the software starts the conversion, write a 0 to the ANTC bit (disabling
conversion start at timer 1 underflow), then write a 1 to ANEN. (If ANTC = 1,
ANEN goes high upon a timer 1 underflow.) ANEN remains high during the con-
version. To end the A/D conversion, write a 0 to ANEN. Note that the
AN1CH[3:0] field holds the number of the channel being converted. It clears to 0
when the sequence ends.
Figure 6-6 Single Channel/Continuous Conversion Timing
Figure 6-7 Multiple Channel/Continuous Conversion Timing
Stop
Start
Interrupt
requests
ANEN
State
Channel n
conversion
Channel n
conversion
Channel n
conversion
Channel n
conversion
Channel n
conversion
Channel 0
conversion
Channel 1
conversion
Channel 2
conversion
Channel 0
conversion
Channel 0
conversion
Channel 1
conversion
Channel 2
conversion
Stop
Start
Interrupt
requests
ANEN
State