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General Description
MN102H Series Description
Panasonic Semiconductor Development Company MN102H75K/F75K/85K/F85K LSI User Manual
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Panasonic
■ Address space
The memory in the MN102H series is configured as linear address space. The
instruction and data areas are not separated, so the basic segments are internal
ROM, internal RAM, and special function registers.
Figure 1-5 shows the address space for the MN102H75K/85K.The internal ROM
contains the instructions and the font data for the on-screen display (OSD), in any
location. The internal RAM contains the MCU data and the VRAM for the OSD,
in any location.
Figure 1-5 Address Space
Special Function
Registers
Internal RAM
Internal ROM
Program
OSD
Text fonts
Graphic tiles
Data
OSD
Text VRAM
Graphics VRAM
Special Function
Registers
x’007E00’
x’007FFF’
x’008000’
x’009FFF’
x’00FC00’
x’00FFFF’
x’080000’
x’0BFFFF’
8 KB
256 KB
Program start address
= x’080000’
Interrupt handler start
address = x’080000’
Note: In writing, do not use MOVB instruction to access Special Function Registers (x’00FC00’ - x’00FFFF’), access by
word. In reading, access by byte is possible.