Lucent Technologies MN10285K Laptop User Manual


 
Interrupts
Interrupt Control Registers
MN102H75K/F75K/85K/F85K LSI User Manual Panasonic Semiconductor Development Company
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Panasonic
OSDCICL: OSD (Text) Interrupt Control Register (Low) x’00FC92’
OSDCICL detects and requests OSD (text) interrupts. It is an 8-bit access
register. Use the MOVB instruction to access it.
OSDCIR: OSD (text) interrupt request flag
0: No interrupt requested
1: Interrupt requested
OSDCID: OSD (text) interrupt detect flag
0: Interrupt undetected
1: Interrupt detected
OSDCICH: OSD (Text) Interrupt Control Register (High) x’00FC93’
OSDCICH enables timer OSD (text) interrupts. It is an 8-bit access register.
Use the MOVB instruction to access it.
The priority level for OSD (text) interrupts is written to the OSDGLV[2:0]
field of the OSDGICH register.
OSDCIE: OSD (text) interrupt enable flag
0: Disable
1: Enable
SCT1ICL: Serial 1 Transmission End Interrupt Control Register (Low) x’00FC98’
SCT1ICL detects and requests serial 1 transmission end interrupts. It is an
8-bit access register. Use the MOVB instruction to access it.
SCT1IR: Serial 1 transmission end interrupt request flag
0: No interrupt requested
1: Interrupt requested
SCT1ID: Serial 1 transmission end interrupt detect flag
0: Interrupt undetected
1: Interrupt detected
Bit:76543210
———
OSDC
IR
———
OSDC
ID
Reset:00000000
R/W:RRRR/WRRRR
Bit:76543210
———————
OSDC
IE
Reset:00000000
R/W:RRRRRRRR/W
Bit:76543210
———
SCT1
IR
———
SCT1
ID
Reset:00000000
R/W:RRRR/WRRRR