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I/O Port Circuit Diagrams
MN102H75K/F75K/85K/F85K LSI User Manual Panasonic Semiconductor Development Company
261
Panasonic
Figure 11-10 P25/TM4IOB/SBI1/SBD1 and P26/TM4IOA/SBO1 (Port 2)
P2PUP5
0: Pullup off
1: Pullup on
P2MD11
00: P25
01: SBI1,SBD1
P2DIR5
0: Port input
1: Port output
0: 3-line (SBI1,SBD1,SBT1)
1: 2-line (SBD1,SBT1)
(PCNT0) bit 11
P2OUT5
P2IN5
P2IN6
SBO1
SBI1
0: Port low output
1: Port high output
Pin
M
00
10
01
U
X
M
U
X
M
U
X
Schmidt trigger
P25/
SBI1/
SBD1/
TM4IOB
Pin
P26/
SBO1/
TM4IOA
P2PUP6
0: Pullup off
1: Pullup on
P2MD13
P2DIR6
0: Port low output
1: Port high output
P2OUT6
Schmidt trigger
P2MD10
10: TM4IOB
11: Reserved
M
00
10
U
X
SIFSEL1
01
TM4IOB output
(PCNT0) bit 13
ODASCI1
0: Push-pull
1: Open-drain
(For I
2
C mode)
P2MD12
00: P25
01: SBI1,SBD1
10: TM4IOB
11: Reserved
0: Port input
1: Port output
TM4IOA output
SBO1
(PCNT0) bit 13
ODASCI1
00
10
01
01
10
00