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I
2
C Bus Controller
I
2
C Bus Interface Registers
MN102H75K/F75K/85K/F85K LSI User Manual Panasonic Semiconductor Development Company
305
Panasonic
I2CDREC: I
2
C Reception Data Register x’007E42’
The I2CDREC register contains the status bits for monitoring the device
and the reception data. I2CDREC is a read-only register.
MODE[1:0]: I
2
C device mode
This field indicates which I
2
C mode the microcontroller is in. MODE1
indicates slave or master, and MODE0 indicates receiver or transmitter. If
the microcontroller loses an arbitration or if a stop condition occurs, the
hardware clears MODE[1:0] to b’00’.
00: Slave receiver 10: Master receiver
01: Slave transmitter 11: Master transmitter
STS: Stop condition at slave receiver
Set to 1 when a stop condition is detected while the microcontroller is in
slave receiver mode.
LRB: Last received bit.
Stores the last serial data bit received. LRB normally indicates the ACK
cycle data.
AAS: Addressed as slave
Set to 1 when the slave address on the bus matches the contents of the
address register or matches the general address (x’00’). AAS resets after a
read from the I2CDREC register.
LAB: Lost arbitration bit
Set to 1 when the microcontroller loses a bus arbitration. LAB resets when
I2CDTRM indicates a start condition (STA = 1).
BB: Bus busy bit
A start condition on the bus sets this flag to 0, and a stop condition resets it
to 1. The microcontroller considers the bus to be busy as long as BB = 0.
D[7:0]: Received data
The serial data received from the I
2
C bus is shifted into this field MSB
first.
I2CMYAD: I
2
C Self Address Register x’007E44’
A[6:0]: Microcontroller address
This register is formed from a 7-bit field address latch. It holds the micro-
controller’s own address, used for a compare when the microcontroller is
addressed as a slave. When a match occurs, AAS is set to 1.
Bit:1514131211109876543210
—
MODE
1
MODE
0
STSLRBAASLABBBD7D6D5D4D3D2D1D0
Reset:0000000100000000
R/W:RRRRRRRRRRRRRRRR
Bit:1514131211109876543210
—————————A6A5A4A3A2A1A0
Reset:0000000000000000
R/W:RRRRRRRRRR/WR/WR/WR/WR/WR/WR/W