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8-Bit Timer Block Diagrams
Panasonic Semiconductor Development Company MN102H75K/F75K/85K/F85K LSI User Manual
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Panasonic
Figure 4-5 Timer 2 Block Diagram
Figure 4-6 Timer 3 Block Diagram
(FE12)
(FE02)
TM2MD
(FE22)
Timer 2
underflow
interrupt
0
1
2
3
Underflow
Reload
Timer 2 base register
TM2BR
TM2LD
TM2EN
TM2S0
TM2S1
Load
Count
8
Timer 2 binary counter
TM2BC
8
88
Data bus
B
OSC
/4
B
OSC
/256
Cascade from timer 1
B
OSC
/512
Multiplexer
(FE13)
(FE03)
TM3MD
(FE23)
Timer 3
underflow
interrupt
0
1
2
3
Underflow
Reload
Timer 3 base register
TM3BR
TM3LD
TM3EN
TM3S0
TM3S1
Load
Count
8
Timer 2 binary counter
TM3BC
8
88
Data bus
B
OSC
/4
B
OSC
/256
Cascade from timer 2
B
OSC
/512
Multiplexer