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On-Screen Display
OSD Registers
MN102H75K/F75K/85K/F85K LSI User Manual Panasonic Semiconductor Development Company
207
Panasonic
CIVSZ[1:0]: Text initial vertical size
CIVP[9:0]: Text initial vertical position
EVOD: Display Start Field Control Register x’007F0E’
EOSEL: Even/odd field select
0: Select the smaller counter value as the display start field
1: Select the larger counter value as the display start field
FRMON: Field register monitor
Monitors which field register (FREG) loaded the counter value on the
leading edge of VSYNC.
0: Loaded to FREG[23:20]
1: Loaded to FREG[13:10]
EOMON: Even/odd field monitor
Set between display fields.
0: No display start field detected
1: Display start field detected
FREG[23:20]: Field register
4-bit register 2 storing field counter value.
FREG[13:10]: Field register
4-bit register 1 storing field counter value.
HCOUNT: HSYNC count x’007F0C’
This register holds the HSYNC count, which indicates the vertical display
position. It is cleared to 0 on the leading edge of VSYNC.
Table 7-18 Text Vertical Size Settings
CIVSZ[1:0]
Setting
1 Dot Size
Interlaced Displays Progressive Displays
00 1 H scan line Reserved
01 2 H scan lines 1 H scan line
10 4 H scan lines 2 H scan lines
11 6 H scan lines 3 H scan lines
Bit:1514131211109876543210
—————
EO
SEL
FR
MON
EO
MON
FREG
23
FREG
22
FREG
21
FREG
20
FREG
13
FREG
12
FREG
11
FREG
10
Reset:0000000000000000
R/W:RRRRRR/WRRRRRRRRRR
Bit:1514131211109876543210
——————
HCNT
9
HCNT
8
HCNT
7
HCNT
6
HCNT
5
HCNT
4
HCNT
3
HCNT
2
HCNT
1
HCNT
0
Reset:0000000000000000
R/W:RRRRRRRRRRRRRRRR