Lucent Technologies MN10285K Laptop User Manual


 
IR Remote Signal Receiver
IR Remote Signal Receiver Control Registers
MN102H75K/F75K/85K/F85K LSI User Manual Panasonic Semiconductor Development Company
223
Panasonic
8.4 IR Remote Signal Receiver Control Regis-
ters
All registers in RMC block cannot be written by byte (by word only). Read by
byte is possible.
RMTC: Remote Signal Frequency Division Control Register x’007EA4’
The edge detection circuit samples
the remote signal with fSYSCLK.
Set the frequency divide-by ratio to
meet this condition. If you do not,
the microcontroller may interpret
the data 1s and 0s incorrectly.
After the program sets the divide-
by ratio for the frequency in
RMTC, the read values may be
incorrect until the circuit detects
the next active edge of the remote
signal.
To identify the remote signal, the IR signal receiver generates a sampling
clock, T
S
, by dividing the PWM3 pulse by the value set in RMTC[7:0].
f
PWM3
is f
SYSCLK
divided by 2
5
(= 375 kHz, 2.7 µs with a 4-MHz oscilla-
tor). The T
S
cycle is the contents of RMTC + 1, so load a value from 1 to
255 for a division ratio from 2 to 256.
The microcontroller reads the value in the frequency division counter as a
ones’ complement number (each digit is complemented).
Set the RMTC value so that T
S
= T/2, where T is the pulse width of the remote
input signal. Table 8-6 shows how to define T for the different formats.
RMTC is an 8- or 16-bit access register.
Table 8-5 IR Remote Signal Receiver Registers
Register Address R/W Function
RMTC x’007EA4’ R/W Remote signal frequency division control register
RMIR x’007EA2’ R/W Remote signal interrupt control register
RMIS x’007EA0’ R/W Remote signal interrupt status register
RMLD x’007EAC’ R/W Remote signal leader value set register
RMCS x’007EA6’ R Remote signal clock status register
RMSR x’007EA8’ R Remote signal reception data shift register
RMTR x’007EAA’ R Remote signal reception data transfer register
Bit:76543210
RMTC7 RMTC6 RMTC5 RMTC4 RMTC3 RMTC2 RMTC1 RMTC0
Reset:00000000
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Table 8-6 HEAMA and 5-/6-Bit Data Pulse Widths
HEAMA format
5-/6-bit format
T3T
Data 1:
HL
TT
Data 0:
2T 2T
Data 0:
2T 6T
Data 1: